Clock modes:
- clk_undefined = 0
- clk_standalone = 1
- clk_clktrig_master = 2
- clk_clktrig_slave = 3
- clk_gps = 4
- clk_gps_master = 5
- clk_irigB_dc_master = 6
- clk_irigB_dc_slave = 7
- clk_ntp = 8
- clk_softsync = 9
- clk_irigB_ac_slave = 10
- clk_gps_irigB_dc_master = 11
- clk_clktrig_slave_res_out = 12
- clk_irigB_dc_slave_res_out = 13
- clk_irigB_ac_slave_dc_master = 14
- clk_irigA_ac_slave = 15
- clk_irigG_ac_slave = 16
- clk_irigA_ac_slave_dc_master = 17
- clk_irigG_ac_slave_dc_master = 18
- clk_irigB_dc_slave_dc_master = 19
- clk_clktrig_master_res_out = 20
- clk_irigB_dc_master_res_out = 21
- clk_ntp_master = 22
- clk_ntp_master_res_out = 23
- clk_ethercat_pps = 24
- clk_ptp_slave = 25
- clk_ntp_irigB_dc_master = 26
- clk_ptp_master = 27
- clk_gps_slave_ptp_master = 28
- clk_irigB_dc_slave_ptp_master = 29
- clk_ptp_slave_irigB_dc_master = 30
- clk_gnss_pps = 31
- clk_gnss_pps_irigB_dc_master = 32
Current modes:
- syncNotDefined = 0
- syncCustom = 1
- syncSoftSync = 2
- syncStandAlone = 3
- syncClockTrigger = 4
- syncIRIG_A_DC = 5
- syncIRIG_B_DC = 6
- syncIRIG_G_DC = 7
- syncIRIG_A_AC = 8
- syncIRIG_B_AC = 9
- syncIRIG_G_AC = 10
- syncNTP = 11
- syncGPS_PPS = 12
- syncEtherCAT_PPS = 13
- syncPTP = 14